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发表于 2016-4-30 15:22:16
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Pin Descriptions
This section provides a detailed description of each signal. The following notations are used to describe the signal
type.
I/O Type Definition
I Input pin O Output pin B Bi-directional pin P Power pin G Ground pin OD Open Drain
Pin No. Name TYPE Descriptions
USB interface
16 UDM DB
USB2.0 negative Data Signal 15 UDP DB USB2.0 positive Data Signal
19 UTXN DO SuperSpeed USB negative Transmitter Signal 20 UTXP DO SuperSpeed USB positive Transmitter Signal 22 URXN DI SuperSpeed USB negative Receiver Signal 23 URXP DI
SuperSpeed USB positive Receiver Signal
SATA interface
29 SRXP DI SATA positive Receiver Signal 30 SRXN DI SATA negative Receiver Signal 32 STXN DO SATA negative Transmitter Signal 33 STXP DO SATA positive Transmitter Signal
System Signals
42 TEST_EN
I
Test Enable Signal, with internal pull-down resistor
0: Normal Mode (Default) 1: Test Mode Enable
2 I2C_DATA B Used as I2C_DATA signal or SPI_DI signal, defined by strapping pin 37 GPIO6. Used as General Purpose IO after power on. Integrated pull-up resistor.
3 I2C_CLK B Used as I2C_CLK signal or SPI_CLK signal, defined by strapping pin 37 GPIO6. Used as General Purpose IO after power on. Integrated pull-up resistor.
5 GPIO5 B General Purpose IO, used as SPI_DO, with internal pull-up resistor. 6 GPIO4 B General Purpose IO, used as SPI_CS0, with internal pull-up resistor. 8 GPIO3
B
General Purpose IO, used as strapping pin for clock source select while power on. Refer to the strapping table. Integrated pull-up resistor. 9 GPIO2 B General Purpose IO, used as SPI_CS1, with internal pull-up resistor.
35 GPIO7 B General Purpose IO, use as strapping for clock source select while power on. Refer to the strapping table. Integrated pull-up resistor.
37 GPIO6 B General Purpose IO, used as strapping for external ROM enabling via SPI interface. Refer to the strapping table. Integrated pull-up resistor.
40 UART_RX B URAT_RX while debug mode, Used as General Purpose IO after power on. Integrated pull-up resistor.
41 UART_TX B UART_TX while debug mode, Used as General Purpose IO after power on. Integrated pull-up resistor.
43 GPIO0 B General Purpose IO. Integrated pull-up resistor. 44 GPIO1 B General Purpose IO. Integrated pull-up resistor.
45
HDDPC
B
HDD power control pin, use as General Purpose IO. Integrated pull-up resistor.
0: Hard Drive Power Off 1: Hard Drive Power On 10 VBUS I USB Cable Power Detector
17 UREXT P
External Reference Resistor with 12.1Kohm +/-1%
ASM1053 Datasheet
5
A
SMedia Confidential for Le
adinglightPin No. Name TYPE
Descriptions
38 RST# I Power Reset pin
Clock Interface
25 XI I Crystal input or Clock input pin
26 XO O Crystal output or Clock output pin
27 VXTLH P Power for Crystal and PLL circuit for 3.3V or 2.5V Voltage Regulator
11 VBUS_LDO P VBUS 5V voltage regulator input 12 VCC33O P 3.3V regulator output 1 VCC33IN P 3.3V regulator input
48 LXI P Connect with external inductor 47 PGND G Ground for voltage regulator
Power and Ground 14, 18 VCC33U P USB 3.3V power pin
34 VCC33S P SATA 3.3V power pin 13, 24 VDD12U P USB 1.2V power pin 28 VCC12S P SATA 1.2V power pin 7, 36, 46 VCC12 P 1.2V Core power 4, 39 VCC33 P IO power for 3.3V 21, 31, 49 GNDA G
Analog Ground
Pin 49 is the exposed pad connected to ground on PCB
Strapping Table
Pin Function
Description GPIO6 SPI Interface Select
0: SPI for External ROM
1: I2C (Default) GPIO[3,7] Clock Select
00: 25MHz Crystal
01: 30MHz Clock Input
10: 20MHz Crystal
11: 30MHz Crystal (Default)
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发表于 2016-4-29 19:14:53
发表于 2016-4-30 07:12:13